Ramasamy / ITU_RR Public

Experiments (1 / 10)

Name Input DSP Blocks Learn Blocks f32_V_Acc f32_T_Acc Tr_Proc f32_Latency f32_RAM f32_Flash i8_Latency i8_RAM i8_Flash

1,000ms. MFE Regression - CPU595 ms.26.6K102.2K442 ms.21.3K47.6K